Models for Bridging Defects

Abstract : Bridging defects are responsible for a large percentage of failures in CMOS technologies and their impact in nanometer technologies with highly dense interconnect structures is expected to increase. In this chapter, a survey of the key developments in modeling bridging defects and their implications in test and diagnosis are presented. An overview of the historical developments of these models from the "wired AND/OR" and "voting" models to more realistic proposals taking into consideration the resistance values of the bridge are presented. The logic detectability of bridging defects considering the resistance of the bridge assuring its detectability is explored. The concept of Analogue Detectability Interval (ADI) as well as its applicability to increase the quality of the vectors detecting these defect classes is introduced. Quality of electronic circuits and systems requires the availability of effective diagnosis techniques. The basic concepts of logic as well as current-based (IDDQ) diagnostic strategies are included in this chapter.
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Chapitre d'ouvrage
Models in Hardware Testing, 43, Springer Netherlands, pp.33-70, 2010, Frontiers in Electronic Testing, 978-90-481-3281-2
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00371365
Contributeur : Martine Peridier <>
Soumis le : vendredi 27 mars 2009 - 15:39:36
Dernière modification le : vendredi 20 juillet 2018 - 12:34:01

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  • HAL Id : lirmm-00371365, version 1

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Michel Renovell, Florence Azaïs, Joan Figueras, Rosa Rodríguez-Montañés, Daniel Arumi. Models for Bridging Defects. Models in Hardware Testing, 43, Springer Netherlands, pp.33-70, 2010, Frontiers in Electronic Testing, 978-90-481-3281-2. 〈lirmm-00371365〉

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