High Launch Switching Activity Reduction in At-Speed Scan Testing using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00406963
Contributor : Lionel Torres <>
Submitted on : Thursday, July 23, 2009 - 5:16:37 PM
Last modification on : Wednesday, August 28, 2019 - 3:46:02 PM

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Kohli Miyase, Hideo Furukawa, Patrick Girard, Xiaoqing Wen, Yuta Yamato, et al.. High Launch Switching Activity Reduction in At-Speed Scan Testing using CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme. IEICE Transactions on Information and Systems, Institute of Electronics, Information and Communication Engineers, 2010, E93-D (1), pp.2-9. ⟨10.1587/transinf.E93.D.2⟩. ⟨lirmm-00406963⟩

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