A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
Conference Papers Year : 2009

A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation

Abstract

This paper presents a new technique called “Analog Network of Converters” that allows to test a set of ADCs and DACs embedded in a complex circuit as SiP and SoC. It presents an experimental validation of this new concept that permits to reduce drastically the testing time and requires only a low cost digital ATE.
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Dates and versions

lirmm-00448863 , version 1 (20-01-2010)

Identifiers

  • HAL Id : lirmm-00448863 , version 1

Cite

Vincent Kerzérho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, et al.. A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation. ECCTD: European Conference on Circuit Theory and Design, Aug 2009, Antalya, Turkey. pp.747-750. ⟨lirmm-00448863⟩
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