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A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation

Vincent Kerzérho 1 Philippe Cauvet 2 Serge Bernard 1 Florence Azaïs 1 Mariane Comte 1 Michel Renovell 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 NXP Semiconductors
Abstract : This paper presents a new technique called “Analog Network of Converters” that allows to test a set of ADCs and DACs embedded in a complex circuit as SiP and SoC. It presents an experimental validation of this new concept that permits to reduce drastically the testing time and requires only a low cost digital ATE.
Keywords : Mixed-signal testing DFT ADC DAC
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00448863
Contributor : Mariane Comte <>
Submitted on : Wednesday, January 20, 2010 - 12:05:25 PM
Last modification on : Tuesday, January 5, 2021 - 4:00:05 PM
Long-term archiving on: : Friday, June 18, 2010 - 1:09:39 AM

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  • HAL Id : lirmm-00448863, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

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Vincent Kerzérho, Philippe Cauvet, Serge Bernard, Florence Azaïs, Mariane Comte, et al.. A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation. ECCTD: European Conference on Circuit Theory and Design, Aug 2009, Antalya, Turkey. pp.747-750. ⟨lirmm-00448863⟩

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