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A Low Power Interface Circuit for Resistive Sensors with Digital Offset Compensation

El Mehdi Boujamaa 1 Boris Alandry 1 Souha Hacine 1 Laurent Latorre 2 Frédérick Mailly 2 Pascal Nouet 2
1 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This paper presents an innovative conditioning and read-out interface for resistive MEMS sensors. The proposed structure includes a digital offset compensation for robustness to process and temperature variations. Simulation results demonstrate an impressive resolution to power consumption ratio and a good immunity to environmental parameters. Experimental results finally demonstrate the efficiency of this promising read-out architecture.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00498468
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Submitted on : Wednesday, July 7, 2010 - 3:22:06 PM
Last modification on : Tuesday, August 27, 2019 - 3:12:02 PM
Long-term archiving on: : Friday, October 8, 2010 - 9:39:17 AM

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  • HAL Id : lirmm-00498468, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

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El Mehdi Boujamaa, Boris Alandry, Souha Hacine, Laurent Latorre, Frédérick Mailly, et al.. A Low Power Interface Circuit for Resistive Sensors with Digital Offset Compensation. ISCAS'10: IEEE International Symposium on Circuits and Systems, Paris, France. pp.3092-3095. ⟨lirmm-00498468⟩

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