Impact of Resistive-Open Defects on the Heat Current of TAS-MRAM Architectures
Abstract
Magnetic Random Access Memory (MRAM) is an emerging technology with the potential to become the universal on-chip memory. Among the existing MRAM technologies, the Thermally Assisted Switching (TAS) MRAM technology offers several advantages compared to the others technologies: selectivity, single magnetic field and integration density. As any other types of memory, TAS-MRAMs are prone to defects, so TAS-MRAM testing needs definitely to be investigated since only few papers can be found in the literature. In this paper we analyze the impact resistive-open defects on the heat current of a TAS-MRAM architecture. Electrical simulations were performed on a hypothetical 4×4 TAS-MRAM architecture enabling any read/write operations. Results show that W0 and/or W1 operations may be affected by the resistive-open defects. This study provides insights into the various types of TAS-MRAM defects and their behavior. As future work, we plan to utilize these analyses results to guide the test phase by providing effective test algorithm targeting fault related to actual defects that may affect TAS-MRAM architecture.
Keywords
MRAM devices
memory architecture
TAS-MRAM architecture
TAS-MRAM testing
electrical simulation
heat current
impact resistive-open defect
magnetic random access memory
read operation
thermally assisted switching MRAM technology
universal on-chip memory
write operation
Heating
Magnetic fields
Magnetic tunneling
Magnetization
Random access memory
Resistance
Switches
TAS-MRAM
fault modeling
non-volatile memories
resistive-open defects
spintronics
test