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How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?

Rodrigo Possamai Bastos 1 Giorgio Di Natale 1 Marie-Lise Flottes 1 Bruno Rouzeyre 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This work analyses and classifies strategies for sampling results of concurrent error detection (CED) schemes in transient fault scenarios. It shows that dealing with results - indicating the occurrence of transient faults in circuits - can require additional mechanisms to make the error indication useful for system's recovery procedures. The paper highlights that not all error indications are noticed by certain strategies of varied costs, and therefore their efficiencies in sampling results as well as the performance, power, and area overheads added to the CED schemes must be considered. The work then finishes presenting a qualitative comparison between existing strategies in function of design goals.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00701776
Contributor : Rodrigo Possamai Bastos <>
Submitted on : Saturday, May 26, 2012 - 2:57:29 PM
Last modification on : Tuesday, December 1, 2020 - 4:29:11 PM
Long-term archiving on: : Monday, August 27, 2012 - 2:21:42 AM

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Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?. RADECS: Radiation and Its Effects on Components and Systems, Sep 2011, Sevilla, Spain. pp.635-642, ⟨10.1109/RADECS.2011.6131361⟩. ⟨lirmm-00701776⟩

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