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Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress

Paolo Rech 1 Jean-Marc Galliere 1 Patrick Girard 1 Alessio Griffoni 2 Jérôme Boch 3, 4 Frédéric Wrobel 4, 3 Frédéric Saigné 4, 3 Luigi Dilillo 1, *
* Corresponding author
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 IMEC - IMEC
3 IES - Institut d’Electronique et des Systèmes
4 RADIAC - Radiations et composants
IES - Institut d’Electronique et des Systèmes
Abstract : We investigate the occurrence of Multiple Bit Upsets in commercial SRAMs of 4 Mbits and 32 Mbits when irradiated with neutrons. The devices were irradiated at TSL facility with QMN beams of energies from 50 MeV to 180 MeV. Experimental data demonstrate that the dynamic-stress increases SRAMs sensitivity as well as MBUs occurrence for both the memory types. We also show that both SEU and MBU cross section may depend on memory architecture and memory utilization.
keyword : SRAM soft error rate Multiple bit upset
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Journal articles
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00805031
Contributor : Luigi Dilillo Connect in order to contact the contributor
Submitted on : Tuesday, March 26, 2013 - 7:09:11 PM
Last modification on : Friday, October 22, 2021 - 3:07:40 PM

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER | IES

Citation

Paolo Rech, Jean-Marc Galliere, Patrick Girard, Alessio Griffoni, Jérôme Boch, et al.. Neutron-Induced Multiple Bit Upsets on Two Commercial SRAMs Under Dynamic-Stress. IEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2012, 59 (4), pp.893-899. ⟨10.1109/TNS.2012.2187218⟩. ⟨lirmm-00805031⟩

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