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Security FPGA Analysis

Eduardo Wanderley 1, 2, 3, 4 Romain Vaslin 2, 3, 4 Jérémie Crenne 2, 3, 5, 4 Pascal Cotret 2 Jean-Philippe Diguet 2 Jean-Luc Danger 2, 3, 4, 6, 7 Philippe Maurine 8 Viktor Fischer 2, 3, 4 Benoit Badrignans 2, 3, 5, 4 Lyonel Barthe 8 Pascal Benoit 8 Lionel Torres 8
1 CEFET-RN
2 Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
3 LHC - Laboratoire Hubert Curien [Saint Etienne]
4 NETHEOS - NETHEOS
5 LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
6 COMELEC - Département Communications & Electronique
7 LTCI - Laboratoire Traitement et Communication de l'Information
8 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Security is becoming since several years a major issue in the domain of embedded systems. Fine grain reconfigurable architectures like FPGAs are providing many interesting features to be selected as an efficient target for embedded systems when security is an important concern. In this chapter we propose an overview of some existing attacks, a classification of attackers and the different levels of security as promoted by the FIPS 140-2 standard. We identify the main vulnerabilities of FPGAs to tackle the security requirements based on the security pyramid concept. We propose a presentation of some existing countermeasures at the different levels of the security pyramid to guarantee a defense-in-depth approach.
Keywords : Security Requirement Security Level Secret Information Fault Injection Residue Number System
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00809327
Contributor : Lionel Torres Connect in order to contact the contributor
Submitted on : Friday, March 18, 2022 - 1:11:30 PM
Last modification on : Monday, April 4, 2022 - 9:28:17 AM

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LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER | LTCI | COMELEC | SSH | UDL | UNIV-ST-ETIENNE | LAB-STICC | UNIV-BREST | INSTITUT-TELECOM | IOGS | CNRS | LAHC | PARISTECH | SYSMIC | ENIB | AXESECULIRMM

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Eduardo Wanderley, Romain Vaslin, Jérémie Crenne, Pascal Cotret, Jean-Philippe Diguet, et al.. Security FPGA Analysis. Security Trends for FPGAS
From Secured to Secure Reconfigurable Systems, pp.7-46, 2011, ⟨10.1007/978-94-007-1338-3_2⟩. ⟨lirmm-00809327⟩

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