Cellule mémoire volatile et non volatile combinée - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Patents Year : 2012

Cellule mémoire volatile et non volatile combinée

Abstract

The invention concerns a memory device comprising at least one memory cell comprising: a first transistor (102) coupled between a first storage node (106) and a first supply voltage (GND, VDD ); a second transistor (104) coupled between a second storage node (108) and said first supply voltage, a control terminal of said first transistor being coupled to said second storage node, and a control terminal of said second transistor being coupled to said first storage node; a first resistance switching element (202) coupled between said first storage node and a first access line (BL); and a second resistance switching element (204) coupled between said second storage node and a second access line (BLB).
No file

Dates and versions

lirmm-00861514 , version 1 (12-09-2013)

Identifiers

  • HAL Id : lirmm-00861514 , version 1

Cite

Yoann Guillemenet, Lionel Torres. Cellule mémoire volatile et non volatile combinée. France, N° de brevet: FR 2970591 (A1) WO/2012/098182 (A1). 2012, pp.N/A. ⟨lirmm-00861514⟩
128 View
0 Download

Share

Gmail Mastodon Facebook X LinkedIn More