MIRID: Mixed-Mode IR-Drop Induced Delay Simulator

Jie Jiang 1 Marina Aparicio 2 Mariane Comte 2 Florence Azaïs 2 Michel Renovell 2 Ilia Polian 1
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : IR-drop effects are increasingly relevant in context of both design and test. We introduce the event-driven simulator MIRID that calculates the impact of IR-drop to the circuit timing. MIRID performs the simulation on two abstraction levels: timing effects in the gate-level net-list; current and voltage waveform propagation in the electrical model of the power- distribution network (PDN). Switching events at the logic gates are forwarded to the electrical model, where induced currents and their impact on the neighboring PDN nodes are computed. From this information, values of voltages at the Vdd and ground terminals of logic gates are determined, which in turn are used to calculate accurate switching delays of the gates. MIRID supports a generic interface to electrical models, allowing for a seamless integration of arbitrary models of PDN and gate timing. We report experiments based on a simple PDN model that was introduced previously and incorporates a pre-characterized library. The simulation accuracy is validated by matching the results from MIRID and SPICE.
Type de document :
Communication dans un congrès
ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. 22nd Asian Test Symposium, pp.177-182, 2013, 〈10.1109/ATS.2013.41〉
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Contributeur : Mariane Comte <>
Soumis le : jeudi 16 janvier 2014 - 17:52:15
Dernière modification le : vendredi 20 juillet 2018 - 12:34:01
Document(s) archivé(s) le : samedi 8 avril 2017 - 20:14:10


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Jie Jiang, Marina Aparicio, Mariane Comte, Florence Azaïs, Michel Renovell, et al.. MIRID: Mixed-Mode IR-Drop Induced Delay Simulator. ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. 22nd Asian Test Symposium, pp.177-182, 2013, 〈10.1109/ATS.2013.41〉. 〈lirmm-00932357〉



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