Test versus Security: Past and Present

Jean Da Rolt 1 Amitabh Das 2 Giorgio Di Natale 1 Marie-Lise Flottes 1 Bruno Rouzeyre 1 Ingrid Verbauwhede 3
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
3 Katholieke Universiteit Leuven, ESAT/COSIC
ESAT/SCD-COSIC - Department of Electrical Engineering - K.U.Leuven
Abstract : Cryptographic circuits need to be protected against side-channel attacks which target their physical attributes while the cryptographic algorithm is in execution. There can be various side-channels, such as power, timing, electromagnetic radiation, fault response, and so on. One such important side-channel is the Design-for-Testability (DfT) infrastructure present for effective and timely testing of VLSI circuits. The attacker can extract secret information stored on the chip by scanning out test responses against some chosen plaintext inputs. The purpose of this paper is to first present a detailed survey on the state-of-the-art in scan based side-channel attacks on symmetric and public-key cryptographic hardware implementations, both in the absence and presence of advanced DfT structures such as test compression and X-masking, which may make the attack difficult. Then the existing scan attack countermeasures are evaluated for determining their security against known scan attacks. Moreover, JTAG vulnerability and security countermeasures are also analyzed as part of the external test interface. A comparative area-timing-security analysis of existing countermeasures at various abstraction levels is presented in order to help an embedded security designer make an informed choice for his intended application.
Type de document :
Article dans une revue
IEEE Transactions on Emerging Topics in Computing, Institute of Electrical and Electronics Engineers, 2014, pp.13. 〈http://www.computer.org/csdl/trans/ec/preprint/06733305-abs.html〉. 〈10.1109/TETC.2014.2304492〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00989627
Contributeur : Marie-Lise Flottes <>
Soumis le : lundi 12 mai 2014 - 11:00:05
Dernière modification le : jeudi 24 mai 2018 - 15:59:24

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Jean Da Rolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, et al.. Test versus Security: Past and Present. IEEE Transactions on Emerging Topics in Computing, Institute of Electrical and Electronics Engineers, 2014, pp.13. 〈http://www.computer.org/csdl/trans/ec/preprint/06733305-abs.html〉. 〈10.1109/TETC.2014.2304492〉. 〈lirmm-00989627〉

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