Cost-Effective Design Strategies for Securing Embedded Processors

Florent Bruguier 1 Pascal Benoit 1 Lionel Torres 1 Lyonel Barthe 1 Morgan Bourrée 1 Victor Lomné 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Side-Channel Attacks (SCAs) such as Differential Power or ElectroMagnetic Analysis (DPA/DEMA), pose a serious threat to the security of embedded systems. In the literature, few articles address the problem of securing General Purpose Processors (GPPs) with resourceful countermeasures. However, in many low-cost applications where security is not critical, cryptographic algorithms are typically implemented in software. Since it has been proved that GPPs are vulnerable to SCAs, it is desirable to develop efficient mechanisms to ensure a certain level of security. In this paper, we extend side-channel countermeasures to the Register Transfer Level (RTL) description. The challenge is to create a new class of processor that executes embedded software applications, which are intrinsically protected against SCAs. For that purpose, we first investigate how to integrate into the datapath two countermeasures based on masking and hiding approaches. Through an FPGA-based processor, we then evaluate the overhead and the effectiveness of the proposed solutions against time-domain first-order attacks. We finally show that a suitable combination of countermeasures significantly increases the side-channel resistance in a cost-effective way.
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Florent Bruguier, Pascal Benoit, Lionel Torres, Lyonel Barthe, Morgan Bourrée, et al.. Cost-Effective Design Strategies for Securing Embedded Processors. IEEE Transactions on Emerging Topics in Computing, Institute of Electrical and Electronics Engineers, 2016, 4 (1), pp.60-72. ⟨10.1109/TETC.2015.2407832⟩. ⟨lirmm-01150269⟩

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