Statistical Energy Study for 28nm FDSOI Devices

Rida Kheirallah 1 Jean-Marc Galliere 2 Aida Todri-Sanial 1 Gilles R. Ducharme 3 Nadine Azemard 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 TEST - TEST
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
3 EPS - Probabilités et statistiques
I3M - Institut de Mathématiques et de Modélisation de Montpellier
Abstract : Due to the effects of the Moore’s law, the process variations in current technologies are increasing and have a major impact on power and performance which results in parametric yield loss. Due to this, process variability and the difficulty of modeling accurately transistor behavior impede the dimensions scaling benefits. The Fully Depleted Silicon-On-Insulator (FDSOI) technology is one of the main contenders for deep submicron devices as they can operate at low voltage with superior energy efficiency compared with bulk CMOS. In this paper, we study the static energy on 28nm FDSOI devices to implement sub-threshold circuits. Study of delay vs. static power trade-off reveals the FDSOI robustness with respect to process variations.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01168602
Contributor : Nadine Azemard <>
Submitted on : Friday, June 26, 2015 - 11:27:20 AM
Last modification on : Friday, September 13, 2019 - 8:42:03 PM

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Rida Kheirallah, Jean-Marc Galliere, Aida Todri-Sanial, Gilles R. Ducharme, Nadine Azemard. Statistical Energy Study for 28nm FDSOI Devices. EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2015, Budapest, Hungary. ⟨10.1109/EuroSimE.2015.7103149⟩. ⟨lirmm-01168602⟩

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