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STT-MRAM-Based Strong PUF Architecture

Elena Ioana Vatajelu 1 Giorgio Di Natale 2 Lionel Torres 3 Paolo Prinetto 1
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
3 ADAC - ADAptive Computing
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Physically Unclonable Functions (PUFs) are emerging cryptographic primitives used to implement low-cost device authentication and secure secret key generation. Weak PUFs (i.e., devices able to generate a single signature or to deal with a limited number of challenges) and Strong PUFs (i.e., devices able to deal with multiple challenges) are widely discussed in literature. The most investigated solutions today are based on CMOS devices. However, with the rapid development of low power, high density, high performance SoCs new technologies have emerged. One of the most promising choices to replace charge-based computing is the spin-based computing, due to its reduced read/write latency and high CMOS integration capability. In this paper, we propose an innovative PUF design based on Spin-Transfer-Torque-MRAM memory. We exploit the high variability affecting the electrical resistance of the Magnetic Tunnel Junction (MTJ) device and special configurations of the reference cells for the read operation. The reference cell array is configured in such a way to allow for normal memory operation, and, when required, allow for signature generation (PUF solution). Switching between memory and PUF is done by controlling the state of the referencing array. In this way, we can generate multiple challenges for the implementation of a Strong PUF solution. We demonstrate that the proposed solution is robust, unclonable and unpredictable.
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Submitted on : Thursday, November 26, 2015 - 11:01:26 AM
Last modification on : Wednesday, December 2, 2020 - 10:32:20 AM




Elena Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto. STT-MRAM-Based Strong PUF Architecture. ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.467-472, ⟨10.1109/ISVLSI.2015.128⟩. ⟨lirmm-01234079⟩



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