A novel Adaptive Fault Tolerant Flip-Flop Architecture based on TMR

Luca Cassano 1 Alberto Bosio 2 Giorgio Di Natale 2
2 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The use of Triple Modular Redundancy (TMR) was historically introduced long time ago for improving reliability of computer systems. Recently, the advances in miniaturizing of CMOS devices made digital circuits more and more unreliable. The current trend goes towards the Internet of Things and the cloud computing, where small devices have high requirements in terms of reduced power consumption and increased reliability. Classical TMR solutions allow for high reliability but they cannot satisfy low-power requirements, since they consume about three times more than the equivalent single device. However, the type of applications that are implemented in the new cloud scenario do not require high reliability all the time, but it can be assumed that some computations are more important, and thus require to be executed by a reliable hardware, while other computations are less important, and thus they can tolerate failures.
Type de document :
Communication dans un congrès
ETS: European Test Symposium, May 2014, Paderborn, Germany. IEEE, 978-1-4799-3415-7/14, 2014, 19th IEEE European Test Symposium (ETS 2014). 〈10.1109/ETS.2014.6847831〉
Liste complète des métadonnées

https://hal-lirmm.ccsd.cnrs.fr/lirmm-01234133
Contributeur : Giorgio Di Natale <>
Soumis le : jeudi 26 novembre 2015 - 11:48:01
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19

Identifiants

Collections

Citation

Luca Cassano, Alberto Bosio, Giorgio Di Natale. A novel Adaptive Fault Tolerant Flip-Flop Architecture based on TMR. ETS: European Test Symposium, May 2014, Paderborn, Germany. IEEE, 978-1-4799-3415-7/14, 2014, 19th IEEE European Test Symposium (ETS 2014). 〈10.1109/ETS.2014.6847831〉. 〈lirmm-01234133〉

Partager

Métriques

Consultations de la notice

21