A trace-driven approach for fast and accurate simulation of manycore architectures

Anastasiia Butko 1 Rafael Garibotti 1 Luciano Ost 1 Chris Adeniyi-Jones 2 Vianney Lapotre 3 Abdoulaye Gamatié 1 Gilles Sassatelli 1
1 ADAC - ADAptive Computing
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 ARM - ARM Ltd [Cambridge]
3 Lab-STICC - Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance
Abstract : The evolution of manycore sytems, forecasted to feature hundreds of cores by the end of the decade calls for efficient solutions for design space exploration and debugging. Among the relevant existing solutions the well-known gem5 simu-lator provides a rich architecture description framework. However , these features come at the price of prohibitive simulation time that limits the scope of possible explorations to configurations made of tens of cores. To address this limitation, this paper proposes a novel trace-driven simulation approach for efficient exploration of manycore architectures.
Keywords : gem5 simulator Manycore architecture simulation Design space exploration Trace-driven approach Architecture description framework
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UNIV-BREST | INSTITUT-TELECOM | ENIB | LAB-STICC | LIRMM | TDS-MACS | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER | ADAC

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Anastasiia Butko, Rafael Garibotti, Luciano Ost, Chris Adeniyi-Jones, Vianney Lapotre, et al.. A trace-driven approach for fast and accurate simulation of manycore architectures. ASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2015, Chiba, Tokyo, Japan. pp.707-712, ⟨10.1109/ASPDAC.2015.7059093⟩. ⟨lirmm-01255921⟩

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