Impact of VT and Body-Biasing on Resistive short detection in 28nm UTBB FDSOI – LVT and RVT configurations

Amit Karel 1 Mariane Comte 1 Jean-Marc Galliere 1 Florence Azaïs 1 Michel Renovell 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : In this paper, we analyse the impact of voltage, temperature and body-biasing on the detection of resistive short defects for low-VT (LVT) and regular-VT (RVT) configurations of a 28nm UTBB FDSOI (Ultra-Thin Body & BOX Fully-Depleted Silicon-on-Insulator) technology. We implemented a similar design in each configuration and compared their electrical behaviors with the same resistive short defect. In addition, this work focuses on determining the individual as well as the combined improvements brought by voltage, temperature and body-biasing settings for achieving the maximum coverage of the resistive short defects.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01374292
Contributor : Florence Azais <>
Submitted on : Friday, September 30, 2016 - 11:14:05 AM
Last modification on : Wednesday, July 24, 2019 - 5:38:14 PM

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Amit Karel, Mariane Comte, Jean-Marc Galliere, Florence Azaïs, Michel Renovell. Impact of VT and Body-Biasing on Resistive short detection in 28nm UTBB FDSOI – LVT and RVT configurations. ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, PA, United States. pp.164-169, ⟨10.1109/ISVLSI.2016.102⟩. ⟨lirmm-01374292⟩

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