Ring Oscillators Analysis for FPGA Security Purposes

Mario Barbareschi Giorgio Di Natale 1 Florent Bruguier 1 Pascal Benoit 1 Lionel Torres 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Nowadays a huge range of applications is deployed on Field Programmable Gate Arrays (FPGAs) devices. In some application domains, security requirements are arising and posing new design issues and challenges. Physically Unclonable Functions (PUFs) are emergent and promising solutions in providing some security mechanisms, such as key storing and generation, challenge/response provider, and protection of Intellectual Property (IP). Most widespread PUFs’ architectures are based on Ring Oscillators (ROs), which exploit comparisons between measured frequencies, obtained from selected RO pairs, in order to generate PUF responses. In this paper, we present a study of the frequencies characteristics, implementing ROs on the Xilinx Spartan 6 family, in order to statistically characterize the oscillations, evaluating the impact of some external uncontrolled parameters that can disturb and alter their original qualities.
Type de document :
Communication dans un congrès
Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Mar 2015, Grenoble, France. 2015
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01419909
Contributeur : Florent Bruguier <>
Soumis le : mardi 20 décembre 2016 - 10:29:27
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19

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  • HAL Id : lirmm-01419909, version 1

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Mario Barbareschi, Giorgio Di Natale, Florent Bruguier, Pascal Benoit, Lionel Torres. Ring Oscillators Analysis for FPGA Security Purposes. Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Mar 2015, Grenoble, France. 2015. 〈lirmm-01419909〉

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