Ring oscillators analysis for security purposes in Spartan-6 FPGAs - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Journal Articles Microprocessors and Microsystems: Embedded Hardware Design Year : 2016

Ring oscillators analysis for security purposes in Spartan-6 FPGAs

Abstract

Nowadays, many digital applications domains are arising and posing new design issued and challenges related to the security and trustworthiness. Physically Unclonable Functions (PUFs) are emergent and promising solutions in providing some security mechanisms, such as key storing and generation, challenge/response provider, and protection of Intellectual Properties (IPs). As a huge range of embedded applications is deployed on Field Programmable Gate Arrays (FPGAs) devices, most widespread PUFs’ architectures are based on Ring Oscillators (ROs), as they are suitable for an implementation on programmable devices. ROPUF exploits comparisons of measured frequencies, obtained by picking a RO pair, aiming to generate bit responses. In this paper, we present a study of the frequencies characteristics, implementing ROs on a significant number of Xilinx Spartan 6 devices, in order to statistically characterize the oscillations, evaluating the impact of some external uncontrolled parameters that can disturb and alter their original qualities, useful to validate the effectiveness of the ROPUF.
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Dates and versions

lirmm-01421001 , version 1 (27-03-2019)

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Mario Barbareschi, Giorgio Di Natale, Florent Bruguier, Pascal Benoit, Lionel Torres. Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocessors and Microsystems: Embedded Hardware Design , 2016, 47 (Part A), pp.3-10. ⟨10.1016/j.micpro.2016.06.005⟩. ⟨lirmm-01421001⟩
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