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Conference Poster Year : 2017

Exploration of magnetic memory for ultra low-power systems-on-chip

Guillaume Patrigeon
Sophiane Senni
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  • PersonId : 1045499
Pascal Benoit
Lionel Torres

Abstract

Memories are currently a real bottleneck to design high speed, low area and energy-efficient systems-on-chip (SoC). An important proportion of total power is spent on memory systems. Ultra low-power (ULP) SoC often use different memory technologies to keep the advantages of each one (area, energy consumption, latency and non-volatility), however there are still penalties and this add more complexity at every development levels. MRAM (Magnetic Random Access Memory) is seen as a promising alternative solution to replace both traditional SRAM (Static Random Access Memory) and NVM (Non Volatile Memory), thanks to its high density, low read/right latency, non-volatility and negligible leakage current. The aim of this work is to explore the possibilities of using MRAM in ULP SoC at various memory levels.
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Dates and versions

lirmm-01548980 , version 1 (28-06-2017)

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  • HAL Id : lirmm-01548980 , version 1

Cite

Guillaume Patrigeon, Sophiane Senni, Pascal Benoit, Lionel Torres. Exploration of magnetic memory for ultra low-power systems-on-chip. 11e Colloque National du GDR SoC/SiP, Jun 2017, Bordeaux, France. , 2017. ⟨lirmm-01548980⟩
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