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Conference Papers Year : 2017

Embedded systems to high performance computing using STT-MRAM

Sophiane Senni
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Thibaud Delobelle
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Odilia Coi
Pierre-Yves Péneau
Lionel Torres
Abdoulaye Gamatié
Pascal Benoit
Gilles Sassatelli


The scaling limits of CMOS have pushed many researchers to explore alternative technologies for beyond CMOS circuits. In addition to the increased device variability and process complexity led by the continuous decreasing size of CMOS transistors, heat dissipation effects limit the density and speed of current systems-on-chip. For beyond CMOS systems, the emerging memory technology STT-MRAM is seen as a promising alternative solution. This paper shows first how STT-MRAM can improve energy efficiency and reliability of future embedded systems. Then, a hybrid design exploration framework is presented to investigate the potential of STT-MRAM for high performance computing.
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lirmm-01548996 , version 1 (28-06-2017)



Sophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Péneau, Lionel Torres, et al.. Embedded systems to high performance computing using STT-MRAM. DATE 2017 - 20th Design, Automation and Test in Europe Conference and Exhibition, Mar 2017, Lausanne, Switzerland. pp.536-541, ⟨10.23919/DATE.2017.7927046⟩. ⟨lirmm-01548996⟩
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