Roundabout: A Network-on-Chip router with adaptive buffer sharing - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2017

Roundabout: A Network-on-Chip router with adaptive buffer sharing

Charles Emmanuel Effiong
Gilles Sassatelli
Abdoulaye Gamatié

Abstract

Adaptive techniques, such as adaptive task migration at runtime, have been introduced in Multiprocessor Systems-on-Chip in order to optimize performance and power consumption. Nevertheless, there is also a potential to adapt the MPSoC communication architecture for further performance and power benefits. As an example, adaptive routings in Networks-on-Chip (NoCs) have been exploited for performance gains. Another promising opportunity, which is here explored, is the adaptive use of the buffering resources in the NoC router. This work presents Roundabout, a new NoC router architecture with inherent and effective buffer utilization. Inspired by real-life multi-lane roundabouts, it consists of lanes shared by input and output ports. A prototype of Roundabout is evaluated using 45nm CMOS technology. The router is able to achieve a throughput of 465 Mflit/sec and without significant area overhead. It achieves a network saturation threshold of 68Gbps on a 4×4 Mesh topology network.
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lirmm-01622878 , version 1 (24-10-2017)

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Charles Emmanuel Effiong, Gilles Sassatelli, Abdoulaye Gamatié. Roundabout: A Network-on-Chip router with adaptive buffer sharing. NEWCAS 2017 - 15th IEEE International New Circuits and Systems Conference, Jun 2017, Strasbourg, France. pp.65-68, ⟨10.1109/NEWCAS.2017.8010106⟩. ⟨lirmm-01622878⟩
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