A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2018

A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM

Abstract

Due to the "memory wall" in conventional Von-Neumann computer architectures, the limited bandwidth between processors and memories has become one of the most critical bottlenecks to improve system performance. With the emerging of non-volatile memories, the computing-in-memory (CIM) paradigm has regained interest to tackle the issue at the architecture level. CIM can effectively alleviate the stress on the limitted bandwidth by performing logic operations within memories. However, CIMs are not yet studied carefully at the circuit level, and even its reliability and performance. In this paper, we proposed a CIM implementation: dual reference (DualRef) scheme at the circuit level within STT-MRAM (Spin Transfer Torque Magnetic Random Access Memory) array. Simulations were carried out to verify the functionality and assess the reliability and performance of DualRef scheme in terms of operation error rate, sensing margin, operation delay and dynamic energy consumption. Simulation results validate DualRef scheme and reveal that it is reliable to perform bitwise logic opertions within STT-MRAM while the TMR (Tunnel Magnetoresistance Ratio) varying between 100% and 300% and supply voltage Vdd varying from 0.9V to 1.2V. This work provides a robust circuitry scheme and design space to effectively implement CIM in STT-MRAM.
Fichier principal
Vignette du fichier
08429379.pdf (498.78 Ko) Télécharger le fichier
Origin : Publisher files allowed on an open archive
Loading...

Dates and versions

lirmm-01880184 , version 1 (27-03-2019)

Identifiers

Cite

Liuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, et al.. A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM. ISVLSI: International Symposium on Very Large Scale Integration, Jul 2018, Hong Kong, China. pp.275-280, ⟨10.1109/ISVLSI.2018.00058⟩. ⟨lirmm-01880184⟩
210 View
196 Download

Altmetric

Share

Gmail Facebook X LinkedIn More