3D power delivery networks are essential for delivering supply voltage to all tiers. PDNs on each tier are mesh networks that are bridged together using Through-Silicon-Vias (TSVs) to devise 3D PDNs. However, a host of vulnerabilities influence their resiliency and reliability such as power supply noise, long parasitic current paths, switching activities, high frequencies, and sensitivity to temperature variations. In this work, we perform a qualitative analysis to capture the impact of TSV-to-TSV substrate coupling (inductive and capacitive), power supply noise transfer among tiers, and different PDN topologies on 3D PDNs. Experiments show the criticality of these factors and their impact on power and thermal integrity of 3D PDNs.