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Conference papers
Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS
David Novo 1
Author Employer institution : Catholic University of Leuven - Katholieke Universiteit Leuven IdHAL : david-novo ORCID : https://orcid.org/0000-0002-5510-4152
R. Fasthuber
Author
P. Raghavan
Author
A. Bourdoux
Author
1
IMEC - IMEC (IMEC, Kapeldreef 75, B-3001 Leuven, Belgium - Belgium)
- KU Leuven - Catholic University of Leuven - Katholieke Universiteit Leuven (Oude Markt 13 - bus 5005, 3000 Leuven - Belgium)
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Conference papers
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-02089304
Contributor : David Novo <>
Submitted on : Wednesday, April 3, 2019 - 4:01:17 PM
Last modification on : Friday, April 5, 2019 - 12:09:10 PM
Contributor : David Novo <>
Submitted on : Wednesday, April 3, 2019 - 4:01:17 PM
Last modification on : Friday, April 5, 2019 - 12:09:10 PM
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- HAL Id : lirmm-02089304, version 1
- DOI : 10.1109/SIPS.2009.5336241
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Citation
David Novo, R. Fasthuber, P. Raghavan, A. Bourdoux, Min Li, et al.. Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS. IEEE Workshop on Signal Processing Systems (SiPS), Oct 2009, Tampere, Finland. pp.151-156, ⟨10.1109/SIPS.2009.5336241⟩. ⟨lirmm-02089304⟩
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