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Physical design and optimisation methods for TSV-based 3D and monolithic 3D integration

Aida Todri-Sanial 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : This talk aims to unveil how to effectively and optimally design 3D circuits covering aspects from 3D stacking to monolithic integration. As first, an overview of physical design challenges with respect to conventional 2D circuits will be provided, followed by an in-depth look into the power and thermal integrity challenges and solutions. More specifically, design challenges related to power, signal and clock distribution will be covered and also present some of the current solutions. Secondly, an overview of the reliability concerns for 3D circuits and their mitigation techniques will be presented. The talk will conclude with current challenges and future directions for 3D physical design.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-02387999
Contributor : Aida Todri-Sanial <>
Submitted on : Sunday, December 22, 2019 - 6:20:31 PM
Last modification on : Monday, January 6, 2020 - 12:47:03 PM
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Aida Todri-Sanial. Physical design and optimisation methods for TSV-based 3D and monolithic 3D integration. 15th Workshop on Heterogeneous Integration of Nanomaterials and Innovative Devices, Sep 2019, Krakow, Poland. pp.217-220, ⟨10.1109/TVLSI.2010.2080694.12⟩. ⟨lirmm-02387999⟩

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