Characterization of a RISC-V Microcontroller Through Fault Injection
Abstract
This article reports the results of fault injection on a microcontroller based on the RISC-V (Riscy) architecture. The fault injection approach uses fault simualation based on Modelsim and targets a set of 1000 fault injected per benchmark. The benchmarks were chosen to be representative of generic workloads but also to specific benchmarks applicable to embed- ded microcontroller in space applications.
Fichier principal
2020___ApplePies___Characterization_of_a_RISC_V_Microcontroller_through_Fault_Injection___HAL_Version.pdf (921.72 Ko)
Télécharger le fichier
Origin | Files produced by the author(s) |
---|