Deliverable D3.1 – Novel memory and communication technologies - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Reports (Research Report) Year : 2016

Deliverable D3.1 – Novel memory and communication technologies

Abdoulaye Gamatié
Pierre-Yves Péneau
Gilles Sassatelli
Sophiane Senni
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Lionel Torres

Abstract

Memory and communication are major performance and energy bottlenecks in manycore architectures. They require particular attention during system design in order to maximize the resulting energy-efficiency. This deliverable surveys a number of existing candidate emerging memory and communication technologies envisioned for the compute node architecture targeted by the CONTINUUM project. It first provides an overview of non-volatile memories by discussing in particular magnetic memories and their application in system memory hierarchy so as to improve the overall energy-efficiency. Then, it presents the main concepts related to on-chip communication interconnects, typically networks on chip (NoCs). Such infrastructures are more scalable than buses or crossbars when the considered architectures feature a high number of cores. The energy improvement studied in CONTINUUM relies on the integration of the previous innovative technologies with suitable heterogeneous manycore/multicore architectures.
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Dates and versions

lirmm-03168312 , version 1 (12-03-2021)

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  • HAL Id : lirmm-03168312 , version 1

Cite

Abdoulaye Gamatié, Pierre-Yves Péneau, Gilles Sassatelli, Sophiane Senni, Lionel Torres. Deliverable D3.1 – Novel memory and communication technologies. [Research Report] LIRMM (UM, CNRS). 2016. ⟨lirmm-03168312⟩
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