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Journal Articles ACM Transactions on Embedded Computing Systems (TECS) Year : 2021

Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs

Abstract

A hardware configuration is a set of processors and their frequency levels in a multi-core heterogeneous system. This paper presents a compiler-based technique to match functions with hardware configurations. Such a technique consists in using multivariate linear regression to associate function arguments with particular hardware configurations. By showing that this classification space tends to be convex in practice, this paper demonstrates that linear regression is not only an efficient tool to map computations to heterogeneous hardware, but also an effective one. To demonstrate the viability of multivariate linear regression as a way to perform adaptive compilation for heterogeneous architectures, we have implemented our ideas onto the Soot Java bytecode analyzer. Code that we produce can predict the best configuration for a large class of Java and Scala benchmarks running on an Odroid XU4 big.LITTLE board; hence, outperforming prior techniques such as ARM’s GTS and CHOAMP, a recently released static program scheduler.
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Dates and versions

lirmm-03366078 , version 1 (05-10-2021)

Identifiers

Cite

Junio Cezar Ribeiro da Silva, Lorena Leão, Vinicius Petrucci, Abdoulaye Gamatié, Fernando Magno Quintão Pereira. Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs. ACM Transactions on Embedded Computing Systems (TECS), 2021, 20 (6), pp.#112. ⟨10.1145/3478288⟩. ⟨lirmm-03366078⟩
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