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Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications

Aibin Yan 1 Aoran Cao 1 Zhelong Xu 1 Jie Cui 1 Tianming Ni 2 Patrick Girard 3 Xiaoqing Wen 4
3 TEST - TEST
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : To meet the requirements of both costeffectiveness and high reliability for low-orbit aerospace applications, this paper first presents a radiation hardened latch design, namely HLCRT. The latch mainly consists of a single-node-upset self-recoverable cell, a 3input C-element, and an inverter. If any two inputs of the C-element suffer from a double-node-upset (DNU), or if one node inside the cell together with another node outside the cell suffer from a DNU, the latch still has a correct value on its output node, i.e., the latch is effectively DNU hardened. Based on the latch, this paper also presents a flip-flop, namely HLCRT-FF that can tolerate SNUs and DNUs. Simulation results demonstrate the SNU/DNU tolerance capability of the proposed HLCRT latch and HLCRT-FF. Moreover, due to the use of a few transistors, clock gating technologies, and high-speed paths, the proposed HLCRT latch and HLCRT-FF approximately save 61% and 92% of delay, 45% and 55% of power, 28% and 28% of area, and 84% and 97% of delay-power-area product on average, compared to state-of-the-art DNU hardened latch/flip-flop designs, respectively.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-03377194
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Submitted on : Thursday, October 14, 2021 - 9:51:06 AM
Last modification on : Friday, October 22, 2021 - 3:07:43 PM

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Aibin Yan, Aoran Cao, Zhelong Xu, Jie Cui, Tianming Ni, et al.. Design of Radiation Hardened Latch and Flip-Flop with Cost-Effectiveness for Low-Orbit Aerospace Applications. Journal of Electronic Testing, Springer Verlag, 2021, ⟨10.1007/s10836-021-05962-0⟩. ⟨lirmm-03377194⟩

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