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Conference Papers Year : 2021

A Novel BIST Engine for CMOS Image Sensors

Abstract

This paper presents a novel test solution directly embedded inside CMOS Image Sensors (CIS) to sort out PASS and FAIL dies during production test. The solution aims at reducing test time, which can represent up to 30% of the final product cost. By simplifying the way optical tests are usually applied with an ATE, the proposed fast and low cost Built-In Self-Test (BIST) solution overcomes the drawbacks of long test time and huge amount of test data storage. Roughly half of the tests usually performed with an ATE can be embedded and applied using the BIST. Results have shown that our solution reduces test time by about 30% without impacting the defect coverage and adding only 0.25% of the total sensor area. The proposed solution outperforms existing solutions in terms of area overhead and test time saving, thus encouraging its future implementation in an industrial production flow.
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Dates and versions

lirmm-03987828 , version 1 (14-02-2023)

Identifiers

  • HAL Id : lirmm-03987828 , version 1

Cite

Julia Lefèvre, Philippe Debaud, Patrick Girard, Arnaud Virazel. A Novel BIST Engine for CMOS Image Sensors. 15e Colloque National du GDR SoC², Jun 2021, Rennes, France. ⟨lirmm-03987828⟩
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