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Conference Papers Year : 2022

On Using Cell-Aware Models for Representing SRAM Architecture

Abstract

This paper presents a novel approach to memory testing which relies on Cell-Aware (CA) test to further improve the yield in SoCs. Therefore, using CA test shifts the memory testing methodology from functional to structural testing. In this paper, a 4 by 4 SRAM architecture is used as a case study. Through transistor to gate-level transformation, the SRAM is represented as an ensemble of "special" standard cells on which the CA test can then be applied.
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Dates and versions

lirmm-03987914 , version 1 (14-02-2023)

Identifiers

  • HAL Id : lirmm-03987914 , version 1

Cite

Xhesila Xhafa, Aymen Ladhar, Eric Faehn, Lorena Anghel, Gregory Di Pendina, et al.. On Using Cell-Aware Models for Representing SRAM Architecture. 16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France. ⟨lirmm-03987914⟩
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