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Comparison Between 0.13 µm PD-SOI Gated Diode and non Gated Diode through DC TCAD Simulations

Christophe Entringer P. Flatrese Pascal Salomé Pascal Nouet 1 Florence Azaïs 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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Conference papers
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00106519
Contributor : Christine Carvalho de Matos <>
Submitted on : Monday, October 16, 2006 - 8:38:42 AM
Last modification on : Thursday, May 24, 2018 - 3:59:24 PM

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  • HAL Id : lirmm-00106519, version 1

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CNRS | SYSMIC | LIRMM | LIRMM_MIC | MIC | MIPS | UNIV-MONTPELLIER

Citation

Christophe Entringer, P. Flatrese, Pascal Salomé, Pascal Nouet, Florence Azaïs. Comparison Between 0.13 µm PD-SOI Gated Diode and non Gated Diode through DC TCAD Simulations. EUROSOI'05, Jan 2005, Grenade, Spain. ⟨lirmm-00106519⟩

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