Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2007

Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution

Abstract

This paper presents an analysis of the electrical origins of Slow Write Driver Faults (SWDFs) [1] that may affect SRAM write drivers in 65nm technology. This type of fault is the consequence of resistive-open defects in the control part of the write driver. It involves an erroneous write operation when the same write driver performs two successive write operations with opposite data values. In the first part of the paper, we present the SWDF electrical phenomena and their consequences on the SRAM functioning. Next, we show how SWDFs can be sensitized and observed and how a standard March test is able to detect this type of fault.
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Dates and versions

lirmm-00187037 , version 1 (11-12-2007)

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Alexandre Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, et al.. Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution. DATE: Design, Automation and Test in Europe, Apr 2007, Nice, France. pp.528-533, ⟨10.1109/DATE.2007.364647⟩. ⟨lirmm-00187037⟩
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