Low-Noise ASIC and New Layout of Multipolar Electrode for Both High ENG Selectivity and Parasitic Signal Rejection - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2007

Low-Noise ASIC and New Layout of Multipolar Electrode for Both High ENG Selectivity and Parasitic Signal Rejection

Abstract

In order to extract and separate Action Potential (AP) signals according to their nerve fascicule origins, we propose a new architecture of a multipolar cuff electrode and an optimized integrated acquisition circuit. The proposed electrode has a specific layout of a large number of poles in order to both reject parasitic signals, such as electromyogram and provide a maximum of spatial selectivity for ENG signals. For one channel to be recorded, we need to consider seven recording sites. A low-noise integrated circuit (ASIC) has been designed in order to perform this first step of analog processing on each set of seven considered poles
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Dates and versions

lirmm-00195231 , version 1 (10-12-2007)

Identifiers

  • HAL Id : lirmm-00195231 , version 1

Cite

Serge Bernard, Lionel Gouyet, Guy Cathébras, Fabien Soulier, David Guiraud, et al.. Low-Noise ASIC and New Layout of Multipolar Electrode for Both High ENG Selectivity and Parasitic Signal Rejection. ICECS'07: International Conference on Electronics, Circuits and Systems, Dec 2007, Marrakech, Morocco, Morocco. pp.A4L-A. ⟨lirmm-00195231⟩
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