Skip to Main content Skip to Navigation
Conference papers

Delay Bound Determination for Timing Closure Satisfaction

Abstract : Minimizing the number of iterations to satisfy performance constraints when designing complex circuits implies as well a good prediction of the place and route interconnect capacitance than a good knowledge of the feasibility of the constraint imposed on the different circuit parts. We present a method to determine the feasibility of delay constraint imposed on a circuit path. From a layout oriented study of the path delay distribution, we show how to obtain the upper and lower bounds for delay on combinational paths. Then we characterize these bounds and present a method to determine, on the path under study, the average weighted loading factor which allows to satisfy the delay constraint. Example of application is given on different ISCAS circuits.
Complete list of metadatas

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00241322
Contributor : Nadine Azemard <>
Submitted on : Wednesday, February 6, 2008 - 11:09:17 AM
Last modification on : Thursday, September 12, 2019 - 8:42:45 PM

Identifiers

Collections

Citation

Nadine Azemard, Michel Aline, Daniel Auvergne. Delay Bound Determination for Timing Closure Satisfaction. ISCAS: International Symposium on Circuits and Systems, May 2001, Sydney, NSW, Australia. pp.375-378, ⟨10.1109/ISCAS.2001.922063⟩. ⟨lirmm-00241322⟩

Share

Metrics

Record views

89