Improving the Test of NoC-Based SoCs with Help of Compression Schemes

Abstract : Re-using the network in a NoC-based system as a test access mechanism is an attractive solution as pointed out by several authors. As a consequence, testing of NoC-based SoCs is becoming a new challenge for designers. However, the effectiveness of testing methods is highly dependent on the number of test interfaces with the tester. This paper proposes the use of a test data compression scheme to increase the number of test interfaces (thus increasing test parallelism) without increasing the number of required Automated Test Equipment (ATE) channels. We show that the combination of compression and NoC-based test scheduling allows a drastic reduction of the system test time at the expense of a very small area overhead.
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Communication dans un congrès
ISVLSI'08: IEEE Computer Society Annual Symposium on VLSI, Apr 2008, Montpellier, France, IEEE Computer Society Publishing Services, pp.139-144, 2008, 〈http://www.lirmm.fr/isvlsi2008/〉
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Contributeur : Bruno Rouzeyre <>
Soumis le : mercredi 9 avril 2008 - 15:12:25
Dernière modification le : jeudi 11 janvier 2018 - 06:27:19
Document(s) archivé(s) le : vendredi 21 mai 2010 - 01:33:44

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Erika Cota, Julien Dalmasso, Marie-Lise Flottes, Bruno Rouzeyre. Improving the Test of NoC-Based SoCs with Help of Compression Schemes. ISVLSI'08: IEEE Computer Society Annual Symposium on VLSI, Apr 2008, Montpellier, France, IEEE Computer Society Publishing Services, pp.139-144, 2008, 〈http://www.lirmm.fr/isvlsi2008/〉. 〈lirmm-00271574〉

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