An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Accéder directement au contenu
Communication Dans Un Congrès Année : 2009

An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects

Résumé

In this paper a new electrical model is proposed to be used in fault size based fault simulation of crosstalk aggravated resistive short defects. The electrical behavior of the defect is first described and analyzed in details. Then an electrical model is proposed allowing to efficiently compute the critical resistance determining the range of detectable short resistance. The model is validated by comparison with SPICE simulations.
Fichier principal
Vignette du fichier
defect-vts09_final.pdf (3.32 Mo) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

lirmm-00374941 , version 1 (10-04-2009)

Identifiants

Citer

Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, et al.. An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. VTS'09: 27th VLSI Test Symposium, May 2009, Santa Cruz, Californie, United States. pp.21-26, ⟨10.1109/VTS.2009.57⟩. ⟨lirmm-00374941⟩
283 Consultations
221 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More