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An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects

Abstract : In this paper a new electrical model is proposed to be used in fault size based fault simulation of crosstalk aggravated resistive short defects. The electrical behavior of the defect is first described and analyzed in details. Then an electrical model is proposed allowing to efficiently compute the critical resistance determining the range of detectable short resistance. The model is validated by comparison with SPICE simulations.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00374941
Contributor : Mariane Comte <>
Submitted on : Friday, April 10, 2009 - 1:21:48 PM
Last modification on : Friday, July 20, 2018 - 12:34:01 PM
Long-term archiving on: : Thursday, June 10, 2010 - 8:18:52 PM

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Nicolas Houarche, Mariane Comte, Michel Renovell, Alejandro Czutro, Piet Engelke, et al.. An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. VTS'09: 27th VLSI Test Symposium, May 2009, Santa Cruz, Californie, United States. pp.21-26, ⟨10.1109/VTS.2009.57⟩. ⟨lirmm-00374941⟩

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