Block- Level Added Redundancy Explicit Authentication for Parallelized Encryption and Integrity Checking of Processor- Memory Transactions

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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00594999
Contributor : Lionel Torres <>
Submitted on : Monday, May 23, 2011 - 10:36:14 AM
Last modification on : Thursday, February 7, 2019 - 5:06:25 PM

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Lionel Torres, Reouven Elbaz, Gilles Sassatelli, Pierre Guillemin, Michel Bardouillet, et al.. Block- Level Added Redundancy Explicit Authentication for Parallelized Encryption and Integrity Checking of Processor- Memory Transactions. Lecture Notes in Computer Science, Springer, 2010, 6340/2010, pp.231-260. ⟨10.1007/978-3-642-17499-5_10⟩. ⟨lirmm-00594999⟩

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