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Pattern Grading for Testing Critical Paths Considering Power Supply Noise and Crosstalk Using a Layout-Aware Quality Metric

Junxia Ma 1 Jeremy Lee 1 Nisar Ahmed 2 Patrick Girard 3 Mohammad Tehranipoor 1 
3 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00618748
Contributor : Martine Peridier Connect in order to contact the contributor
Submitted on : Friday, September 2, 2011 - 4:47:21 PM
Last modification on : Friday, August 5, 2022 - 10:47:57 AM

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  • HAL Id : lirmm-00618748, version 1

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Junxia Ma, Jeremy Lee, Nisar Ahmed, Patrick Girard, Mohammad Tehranipoor. Pattern Grading for Testing Critical Paths Considering Power Supply Noise and Crosstalk Using a Layout-Aware Quality Metric. GLSVLSI'10: IEEE Great Lake Symposium on VLSI, United States. pp.127-130. ⟨lirmm-00618748⟩

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