Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs

Arnaud Virazel 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-00679494
Contributor : Martine Peridier <>
Submitted on : Thursday, March 15, 2012 - 5:11:34 PM
Last modification on : Thursday, May 24, 2018 - 3:59:24 PM

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Arnaud Virazel. Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs. NVM'11: Leading-Edge Embedded NVM Workshop, Gardane, France. ⟨lirmm-00679494⟩

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