A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits

Complete list of metadatas

https://hal-lirmm.ccsd.cnrs.fr/lirmm-00679513
Contributor : Martine Peridier <>
Submitted on : Thursday, March 15, 2012 - 5:28:20 PM
Last modification on : Wednesday, August 28, 2019 - 3:46:02 PM

Identifiers

  • HAL Id : lirmm-00679513, version 1

Collections

Citation

Ahn Duc Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, et al.. A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits. GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France. ⟨lirmm-00679513⟩

Share

Metrics

Record views

146