Test and diagnosis of power switches

Miroslav Valka 1 Alberto Bosio 1 Luigi Dilillo 1 Aida Todri-Sanial 2 Arnaud Virazel 1 Patrick Girard 1 Philippe Debaud 3 Stephane Guilhot 3
1 TEST - TEST
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
2 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : Power-gating techniques have been adopted so far to reduce the static power consumption of an Integrated Circuit (IC). Power gating is usually implemented by means of several power switches. Manufacturing defects affecting power switches can lead to increase the actual static power consumption and, in the worst case they can completely isolate a functional block of the IC. In this paper we present a novel Design for Test & Diagnosis to increase the test quality and diagnosis accuracy of power switches. The proposed approach has been validated through SPICE simulations on ITC'99 benchmark circuits.
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01248590
Contributor : Aida Todri-Sanial <>
Submitted on : Sunday, December 27, 2015 - 9:41:24 PM
Last modification on : Wednesday, August 28, 2019 - 3:46:02 PM

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Miroslav Valka, Alberto Bosio, Luigi Dilillo, Aida Todri-Sanial, Arnaud Virazel, et al.. Test and diagnosis of power switches. DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.213-218, ⟨10.1109/DDECS.2014.6868792⟩. ⟨lirmm-01248590⟩

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