Scan-chain intra-cell defects grading

Abstract : With the continuous scaling down of the transistor size, the so-called intra-cell defects are more and more frequent. Several works analyze the impact of intra-cell defects w.r.t. the test quality. However, to the best of our knowledge, none of them target intra-cell defects affecting scan flip-flops. This paper presents an evaluation of the effectiveness of the ATPG test patterns in terms of intra-cell defect coverage affecting scan flip-flops. The experimental results show that a meaningful test solution has to be developed to improve the overall defect coverage for the scan chain testing.
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Communication dans un congrès
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. Design Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on, pp.1-6, 2015, 〈10.1109/DTIS.2015.7127349〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01272696
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Soumis le : mardi 17 mai 2016 - 15:09:32
Dernière modification le : jeudi 28 juin 2018 - 18:44:04

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Aymen Touati, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel, et al.. Scan-chain intra-cell defects grading. DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. Design Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on, pp.1-6, 2015, 〈10.1109/DTIS.2015.7127349〉. 〈lirmm-01272696〉

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