Trading-off System Load and Communication in Mapping Heuristics for Improving NoC-Based MPSoCs Reliability

Abstract : Improving embedded systems lifetime and reliability become a major concern for the semiconductor industry. Imbalanced mapping of applications may considerably impact on system lifetime since processors and NoC links located in hotspot zones may age faster than others, compromising the overall system performance. This work proposes a dynamic mapping heuristic that makes a trade-off between processors' load and NoC communication volume, aiming to increase system reliability. Results show the proposed heuristic provides a well-balanced workload distribution while reducing communication volume. Results showed that proposed mapping reduces application execution time (average 10%) and hotspots zones when compared to conventional mapping approaches.
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Communication dans un congrès
ISQED: International Symposium on Quality Electronic Design, Mar 2015, Santa Clara, United States. 16th International Symposium on Quality Electronic Design, pp.392-396, 2015, 〈10.1109/ISQED.2015.7085457〉
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https://hal-lirmm.ccsd.cnrs.fr/lirmm-01419118
Contributeur : Gilles Sassatelli <>
Soumis le : dimanche 18 décembre 2016 - 19:56:31
Dernière modification le : jeudi 28 juin 2018 - 15:12:04
Document(s) archivé(s) le : lundi 20 mars 2017 - 18:34:02

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Marcelo Mandelli, Luciano Ost, Gilles Sassatelli, Fernando G. Moraes. Trading-off System Load and Communication in Mapping Heuristics for Improving NoC-Based MPSoCs Reliability. ISQED: International Symposium on Quality Electronic Design, Mar 2015, Santa Clara, United States. 16th International Symposium on Quality Electronic Design, pp.392-396, 2015, 〈10.1109/ISQED.2015.7085457〉. 〈lirmm-01419118〉

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