Simulating Resistive Bridging and Stuck-At Faults - LIRMM - Laboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier Access content directly
Conference Papers Year : 2003

Simulating Resistive Bridging and Stuck-At Faults

Abstract

We present a simulator for resistive bridging and stuck-at faults. In contrast to earlier work, it is based on electrical equations rather than table look-up, thus exposing more flexibility. For the first time, simulation of sequential circuits is dealt with; reciprocal action of fault effects in current time frame and earlier time frames is elaborated on for different bridge resistances. Experimental results are given for resistive bridging and stuck-at faults in combinational and sequential circuits. Different definitions of fault coverage are listed and quantitative results with respect to all these definitions are given for the first time.
Fichier principal
Vignette du fichier
ITC_2003.pdf (216.21 Ko) Télécharger le fichier
Origin : Files produced by the author(s)

Dates and versions

lirmm-00269611 , version 1 (20-03-2024)

Identifiers

Cite

Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker. Simulating Resistive Bridging and Stuck-At Faults. ITC 2003 - IEEE International Test Conference, Sep 2003, Charlotte, NC, United States. pp.1051-1059, ⟨10.1109/TCAD.2006.871626⟩. ⟨lirmm-00269611⟩
179 View
0 Download

Altmetric

Share

Gmail Facebook X LinkedIn More