Spin transfer torque magnetic random access memory (STT-MRAM) possesses many desirable properties such as nonvolatility, fast access speed, unlimited endurance, and good compatibility with CMOS fabrication process. ITRS has highlighted the potential of STT-MRAM as one of the candidates for the next-generation universal memory technology. However, both the behaviors of the Magnetic Tunnel Junction (MTJ) and the CMOS access transistor, which are two basic elements of STT-MRAM, are generally temperature dependent, threatening the reliability, and performance of STT-MRAM under thermal fluctuations. To investigate the reliability and performance of STT-MRAM under the temperature variation, we developed a thermal model for the perpendicular magnetic anisotropy MTJ device. With the developed model, thermal behaviors and performance of the hybrid MTJ/CMOS circuits can be characterized and thermal optimization techniques can then be studied. Afterward, a thermal-aware sensing circuit is proposed as a case study to exploit the thermal characteristics for improving STT-MRAM read reliability under the temperature variations. Our simulation results show that the proposed sensing circuit can distinctly reduce the read error rate under thermal fluctuations compared with the state-of-the-art designs.