For embedded systems in harsh environments, a radiation robust circuit design is still an open challenge. As complementary-metal-oxide semiconductor (CMOS) processes get denser and smaller, their immunity toward particle strikes decreases drastically. Due to its good radiation effects tolerance and its inherent nonvolatility, spin-transfer torque magnetic tunnel junction (STT-MTJ) is considered a promising candidate for high-reliability electronics. Nevertheless, when integrated in a CMOS circuit, these magnetic devices could still be affected by upsets. To decrease the probability of this occurrence, a radiation robust setup is used to calibrate a physics-based 20-nm MTJ compact model, integrated in a 28-nm Fully Depleted Silicon On Insulator (FD-SOI) technology. Thus, a radiation hardening by design (RHBD) solution is presented, where a nonvolatile sequential block enables one to mitigate the single-event effects (SEEs).